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MMDF1N05E Power MOSFET 1 Amp, 50 Volts
N-Channel SO-8, Dual
These miniature surface mount MOSFETs feature ultra low RDS(on) and true logic level performance. They are capable of withstanding high energy in the avalanche and commutation modes and the drain-to-source diode has a low reverse recovery time. MiniMOSt devices are designed for use in low voltage, high speed switching applications where power efficiency is important. Typical applications are dc-dc converters, and power management in portable and battery powered products such as computers, printers, cellular and cordless phones. They can also be used for low voltage motor controls in mass storage products such as disk drives and tape drives. The avalanche energy is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients.
Features http://onsemi.com
1 AMPERE, 50 VOLTS RDS(on) = 300 mW
N-Channel D
G S
* * * * * * * * *
Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery Life Logic Level Gate Drive - Can Be Driven by Logic ICs Miniature SO-8 Surface Mount Package - Saves Board Space Diode Is Characterized for Use In Bridge Circuits Diode Exhibits High Speed Avalanche Energy Specified Mounting Information for SO-8 Package Provided IDSS Specified at Elevated Temperature Pb-Free Package is Available
MARKING DIAGRAM
8 8 1 SO-8 CASE 751 STYLE 11 1 F1N05 AYWWG G
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating Drain-to-Source Voltage Gate-to-Source Voltage - Continuous Drain Current - Continuous Drain Current - Pulsed Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = 25 V, VGS = 10 V, IL = 2 Apk) Operating and Storage Temperature Range Total Power Dissipation @ TA = 25C Thermal Resistance, Junction-to-Ambient (Note 1) Maximum Temperature for Soldering, Time in Solder Bath Symbol VDS VGS ID IDM EAS Value 50 20 2.0 10 300 Unit V V A
F1N05 = Device Code A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location)
PIN ASSIGNMENT
Source-1 1 2 3 4 8 7 6 5 Drain-1 Drain-1 Drain-2 Drain-2 Gate-1 Source-2 Gate-2
mJ
TJ, Tstg PD RqJA TL
-55 to 150 2.0 62.5 260 10
C W C/W C Sec
Top View
ORDERING INFORMATION
Device MMDF1N05ER2 MMDF1N05ER2G Package SO-8 Shipping 2,500/Tape & Reel
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Mounted on 2 square FR4 board (1 sq. 2 oz. Cu 0.06 thick single sided) with one die operating, 10 sec. max.
(c) Semiconductor Components Industries, LLC, 2006
SO-8 2,500/Tape & Reel (Pb-Free)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: MMDF1N05E/D
1
February, 2006 - Rev. 8
MMDF1N05E
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0, ID = 250 mA) Zero Gate Voltage Drain Current (VDS = 50 V, VGS = 0) Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0) ON CHARACTERISTICS (Note 2) Gate Threshold Voltage (VDS = VGS, ID = 250 mAdc) Drain-to-Source On-Resistance (VGS = 10 Vdc, ID = 1.5 Adc) (VGS = 4.5 Vdc, ID = 0.6 Adc) Forward Transconductance (VDS = 15 V, ID = 1.5 A) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Note 3) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge SOURCE-DRAIN DIODE CHARACTERISTICS (TC = 25C) Forward Voltage (Note 2) Reverse Recovery Time (IS = 1.5 A, VGS = 0 V) (dIS/dt = 100 A/ms) VSD trr - - - 45 1.6 - V ns (VDS = 10 V, ID = 1.5 A, VGS = 10 V) (VDD = 10 V, ID = 1.5 A, RL = 10 W, VG = 10 V, RG = 50 W) td(on) tr td(off) tf Qg Qgs Qgd - - - - - - - - - - - 12.5 1.9 3.0 20 30 40 25 - - - nC ns (VDS = 25 V, VGS = 0, f = 1.0 MHz) Ciss Coss Crss - - - 330 160 50 - - - pF VGS(th) RDS(on) RDS(on) gFS 1.0 - - - - - - 1.5 3.0 0.30 0.50 - mhos Vdc W V(BR)DSS IDSS IGSS 50 - - - - - - 2 100 Vdc mAdc nAdc Symbol Min Typ Max Unit
2. Pulse Test: Pulse Width 300 ms, Duty Cycle 2.0%. 3. Switching characteristics are independent of operating junction temperature.
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MMDF1N05E
TYPICAL ELECTRICAL CHARACTERISTICS
10 10 5V I D , DRAIN CURRENT (AMPS) 8 VDS 10 V
10 V
6V 8V
TJ = 25C
-55 C
25C 100C
I D , DRAIN CURRENT (AMPS)
8 4.5 V 6 4V 4 VGS = 3.5 V
6
4
25C
2 0
2 100C -55 C 3 4 5 6 7 8
0
4 6 8 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
2
10
0
0
1
2
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics
RDS(on) , DRAIN-TO-SOURCE ON-RESISTANCE (OHMS) RDS(on) , DRAIN-TO-SOURCE ON-RESISTANCE (NORMALIZED) 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -50 -25
Figure 2. Transfer Characteristics
0.5 VGS = 10 V 0.4
VGS = 10 V ID = 1.5 A
0.3
0.2
100C 25C
0.1 -55C 0 0 2 4 6 ID, DRAIN CURRENT (AMPS) 8
25 75 0 50 100 TJ, JUNCTION TEMPERATURE (C)
125
150
Figure 3. On-Resistance versus Drain Current
V GS(th), GATE THRESHOLD VOLTAGE (NORMALIZED) RDS(on) , DRAIN-TO-SOURCE RESISTANCE (OHMS)
Figure 4. On-Resistance Variation with Temperature
0.5 ID = 1.5 A VGS = 0
1.2 VDS = VGS ID = 1 mA
0.4
1.1
0.3
1
0.2
0.9
0.1
0.8
0
2
3
4
5 6 7 8 TJ, JUNCTION TEMPERATURE
9
10
0.7 -50
-25
0 25 50 75 100 TJ, JUNCTION TEMPERATURE (C)
125
150
Figure 5. On Resistance versus Gate-To-Source Voltage
Figure 6. Gate Threshold Voltage Variation with Temperature
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MMDF1N05E
1200 1000 C, CAPACITANCE (pF) 800 VDS = 0 600 400 200 0 Ciss Coss Crss 20 10 0 20 25 15 5 5 10 15 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) VGS = 0 VGS Ciss Crss TJ = 25C 0 VDS VGS , GATE-TO-SOURCE VOLTAGE (VOLTS) 12 10 8 6 4 2 0 VDS = 25 V ID = 1.2 A
0
2
4
6 8 10 12 Qg, TOTAL GATE CHARGE (nC)
14
16
Figure 7. Capacitance Variation
Figure 8. Gate Charge versus Gate-To-Source Voltage
100 I D , DRAIN CURRENT (AMPS) VGS = 20 V SINGLE PULSE TC = 25C
Mounted on 2 sq. FR4 board (1 sq. 2 oz. Cu 0.06 thick single sided) with one die operating, 10s max.
SAFE OPERATING AREA INFORMATION
Forward Biased Safe Operating Area
The FBSOA curves define the maximum drain-to-source voltage and drain current that a device can safely handle when it is forward biased, or when it is on, or being turned on. Because these curves include the limitations of simultaneous high voltage and high current, up to the rating of the device, they are especially useful to designers of linear systems. The curves are based on a case temperature of 25C and a maximum junction temperature of 150C. Limitations for repetitive pulses at various case temperatures can be determined by using the thermal response curves. ON Semiconductor Application Note, AN569, "Transient Thermal Resistance - General Data and Its Use" provides detailed instructions.
10
10 ms 1 dc
100 ms
10 ms
0.1
RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 10 100
0.01 0.1
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 9. Maximum Rated Forward Biased Safe Operating Area
10 Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE
1
D = 0.5 0.2 0.1 0.05 0.02 0.01
0.1
Normalized to qja at 10s.
Chip
0.0175 W 0.0710 W 0.2706 W 0.5776 W 0.7086 W
0.01 SINGLE PULSE 0.001 1.0E-05 1.0E-04 1.0E-03 1.0E-02
0.0154 F 0.0854 F 0.3074 F 1.7891 F 107.55 F
Ambient 1.0E+03
1.0E-01 t, TIME (s)
1.0E+00
1.0E+01
1.0E+02
Figure 10. Thermal Response
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MMDF1N05E
PACKAGE DIMENSIONS
SOIC-8 CASE 751-07 ISSUE AG
-X- A
8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 DRAIN 2 DRAIN 1 DRAIN 1 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060
STYLE 11: PIN 1. 2. 3. 4. 5. 6. 7. 8.
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
MiniMOS is a trademark of Semiconductor Components Industries, LLC (SCILLC). Company.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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MMDF1N05E/D

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